1. Field of the Invention
The present invention relates to a substrate for mounting an IC chip applicable to a package substrate onto which an IC chip is mounted.
2. Description of the Related Art
An IC chip and a package substrate have conventionally been connected with an interposer. The interposer is connected to the pads located on the outermost layer of the package substrate through solder bumps. Japanese Laid-open patent 2001-102479 gazette discloses a semiconductor integrated circuit device wherein a 4-layer wiring interposer is attached to the pads of a rough-pitch substrate through solder bumps. The entire contents of this application is incorporated herein be reference.
However, since the conventional technology is such that the connection between the interposer and the package substrate is made through solder bumps made of a high resistant solder, there occurs a large voltage drop on account of the solder bumps when the IC chip mounted on said interposer instantaneously consumes a large electrical power, resulting in a difficulty of maintaining the voltage value over a certain range and in causing the IC chip to malfunction due to the voltage drop.
Further, the mounting of an interposer onto a package substrate required complex operations such as (i) aligning the solder bumps on the interpose side with the connecting pads of the package substrate, (ii) reflowing, (iii) underfill filling, etc.